1. Field of the Invention
The present invention relates generally to integrated circuit chip package technology and, more particularly, to a semiconductor package which includes exposed leads and one or more exposed anchor pads on the bottom surface of the package body thereof, the anchor pad(s) each being formed on and/or defined by the die pad of the semiconductor package leadframe.
2. Description of the Related Art
Semiconductor dies are conventionally enclosed in plastic packages that provide protection from hostile environments and enable electrical interconnection between the semiconductor die and an underlying substrate such as a printed circuit board (PCB) or motherboard. The elements of such a package include a metal leadframe, an integrated circuit or semiconductor die, bonding material to attach the semiconductor die to the leadframe, bond wires which electrically connect pads on the semiconductor die to individual leads of the leadframe, and a hard plastic encapsulant material which covers the other components and forms the exterior of the semiconductor package commonly referred to as the package body.
The leadframe is the central supporting structure of such a package, and is typically fabricated by chemically etching or mechanically stamping a metal strip. A portion of the leadframe is internal to the package, i.e., completely surrounded by the plastic encapsulant or package body. Portions of the leads of the leadframe extend externally from the package body or are partially exposed therein for use in electrically connecting the package to another component. In certain semiconductor packages, a portion of the die attach pad or die pad of the leadframe also remains exposed within the package body.
In the electronics industry, there is an increasing need for semiconductor packages which include leadframes adapted for large die, low input/output applications. Such leadframes typically include die pads which are sized to accommodate large semiconductor dies, and provide the requisite mechanical anchoring and thermal dissipation characteristics for the packages. In such semiconductor packages, one surface (i.e., the bottom surface) of the die pad is typically exposed within the bottom surface of the package body. However, because of the large size of the die pad and hence the large area of the exposed surface thereof, circuit routing on the underlying printed circuit board underneath the exposed die pad becomes difficult to the increased risk of shorting. In many applications, diminishing space availability increases the need to be able to accomplish high density routing on the printed circuit board under any exposed pad semiconductor packages mounted thereto.
Thus, there exists a need for large exposed pad semiconductor packages which are adapted to accommodate large semiconductor dies, yet are configured to allow for high density circuit routing under the package(s), thus improving routing flexibility on the printed circuit board to which the package(s) are surface mounted. The present invention addresses this particular need by providing a large exposed pad semiconductor package which defines one or more anchor pads formed on and/or defined by the die pad of the leadframe thereof. Such anchor pad(s) may be provided in any one of a multiplicity of different pad shapes, and are adapted to satisfy the required mechanical anchoring and thermal dissipation thresholds for the package, while still enabling high density circuit routing on the printed circuit board under the package. These, as well as other features and attributes of the present invention will be discussed in more detail below.